1. Field of the Invention
The invention relates to a method for post-etch cleaning for dual damascene, and more particularly to a method for post-etch cleaning that does not result in Cu erosion after post-etch cleaning.
2. Description of the Prior Art
Cleaning processes typically play an important role in the formation of integrated circuit (i.e., semiconductor) devices. Specifically, the cleaning processes are often necessary since wafers utilized in the devices usually become contaminated during processing.
When the DRAM chip has a memory of 1 gigabit, and a typical CPU has 13 million transistors/cm2, the number of metal layers (the xe2x80x9cwiresxe2x80x9d) would increase from the current 2-3 to 5-6 and the operating frequency, which is currently 200 MHz, would increase to 500 MHz. This would increase the need for a three-dimensional construction on the wafer chip to reduce delays of the electrical signals. Newer methods to etch, planarize and to clean the wafers after each of these critical steps must be developed. Usually the amine-based chemistries are used to remove post etching residues (xe2x80x9cpolymer residues,xe2x80x9d xe2x80x9cfences,xe2x80x9d vails, etc.).
At some point during the wet chemical processing (for metal etching or post etching residue removal, etc.) of a wafer in the semiconductor industry (or flat panel displays, microelectro-mechanical devices, etc.), the material must xe2x80x9cmove throughxe2x80x9d a rinse step, or a post-clean treatment step. Such rinse steps are design to remove the chemicals applied in the previous step and stop any further chemical effects from the previous chemicals. These solutions are also designed to reduce particles on the substrate surfaces. FIG. 1 is a flow chart for post-etch cleaning. First, amine-based solvent removes photoresist materials (step 101); then deionized water rinse subsequently removes the residues (step 102). Next, nitrogen gas is used to dry the wafer (step 103) and then spin dry is finally used to dry the wafer (step 104).
FIG. 2A is a cross-sectioned diagram illustrating a Cu/low-k dual damascene structure. A copper conductor structure 130 is adjacent to a first low-k dielectric layer 110 and a cap layer 140 is formed thereon. An etched second low-k dielectric layer 120 with a pattern is on the cap layer 140. Next, as shown in FIG. 2B, for removing the cap layer 140 and etching residues, a conventional amine-based solvent is used such that copper recess in the copper conductor structure 130 is observed and shown as a dash line 150. Next, depicted in FIG. 2C, after copper material is filled by physical vapor deposition (PVD) and electroplate chemical deposition (ECD) and is thereafter planarized, there are still voids 160 formed. The voids 160 enable the copper molecules in the copper conductor structure diffusing and migrating during substantial thermal cycles of process, and further result in poor reliability and resistance shifting. However, in a Cu/spin-on low-k dual damascene device, the combination of water and alkanolamine contained therein can attack the metallic layers. The addition of a corrosion inhibitor to these products can mitigate to a certain extent the unwanted attack on the metallic layers and oxide layers. Furthermore, since these products have a high pH, even in the presence of a corrosion inhibitor, they may attack certain corrosion-sensitive metal layers. Particularly, metal layers such as aluminum, titanium nitride, copper and the like are particularly corrosion sensitive. The Cu erosion can result in electrical shifting, so it is important to eliminate the Cu corrosion problem.
It is an object of the present invention to provide a method for eliminating corrosion during the procedure of cleaning etching residues. An intermediate solvent containing N-methylpyrrolidone compound is applied to removing the material resulting in corrosion.
It is another object of the present invention to provide a method for preventing copper erosion during the procedure of cleaning etching residues. The residue amine during cleaning procedure can be removed by an isopropyl alcohol-contained solvent, so as to prevent the combination of amine residue and deionized water and copper erosion.
In the present invention, a method for avoiding erosion of a conductor structure during a procedure of removing etching residues is provided. The method provides a semiconductor structure and the conductor structure formed therein. A cap layer is formed on the conductor structure and the semiconductor and a dielectric layer formed thereon. The dielectric layer and the cap layer are then etched to partially expose the conductor structure. The etching residues are removed with an amine-containing solution (e.g. EKC525) and the amine-containing solution is removed with an intermediate solvent to avoid erosion of exposed the conductor structure. As a key step of the present invention, the intermediate solvent comprises N-methylpyrrolidone or isopropyl alcohol and can prevent the conductor structure from being eroded.